(1) Field of the Invention
The present invention relates to an information processing apparatus composed of a CPU and a coprocessor. The present invention particularly relates to saving of data relating to a calculation performed by the coprocessor and restoration of the saved data.
(2) Related Art
Some of information processing apparatuses have a CPU and a coprocessor coupled to the CPU for improving the basic capability of the information processing apparatus.
As an example of such an information processing apparatus, Patent Document 1 (Japanese Patent No. 2987308) discloses an information processing apparatus having a CPU that mainly operates to perform processing and a coprocessor that is physically coupled to the CPU and performs particular calculations. The coprocessor decodes an instruction that is the same as an instruction the CPU decodes. If the decoded instruction is executable, the coprocessor performs a calculation when data relating to the calculation is given from the CPU. The coprocessor outputs a result of the calculation to the CPU. While the coprocessor performs the calculation, the CPU executes another instruction. Accordingly, the basic capability of the information processing apparatus is improved.
By manufacturing a coprocessor having a different structure according to purpose and coupling such a coprocessor to the CPU, it is possible to easily improve the capability of the information processing apparatus without modifying the physical structure of the CPU. Also, since only the structure of the coprocessor needs to be modified according to purpose, it is possible to reduce a time period required for developing the information processing apparatus compared with a case where a new information processing apparatus designed exclusively for an intended purpose is manufactured.
Here, the coprocessor of the information processing apparatus disclosed in the Patent Document 1 temporarily stores data required for a calculation and calculation result data in a register included in the coprocessor. When an interruption occurs while the information processing apparatus performs normal processing, the coprocessor might perform a calculation and write a result of the calculation or the like over data stored in the register. Accordingly, it is necessary to save, from the register, the data relating to a calculation that has been executed before the interruption is occurred.
In order to handle the interruption, a dedicated instruction for saving data from a register is necessary. Also, after an interruption instruction has been executed, the saved data needs to be restored. Accordingly, an instruction for restoring the saved data is also necessary. As disclosed in the Patent Document 1, a dedicated instruction for directly specifying a register from which data is to be output may be generated for each register. However, the count of extended calculation instructions executable by the coprocessor is limited. Types of calculations executable by the coprocessor are expected to increase in the future. With this increase, the count of registers needs to be increased. In such a case, if a dedicated extended calculation instruction is allotted to each register, the count of dedicated extended calculation instructions will become too many.